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What is the output of a synchronous counter?
Fig. 5.6.6 shows two stages of a synchronous counter. The binary output is taken from the Q outputs of the flip-flops. Note that on FF0 the J and K inputs are permanently wired to logic 1, so Q 0 will change state (toggle) on each clock pulse. This provides the ‘ones’ count for the least significant bit.
What do you need to know about asynchronous counters?
Describe the action of asynchronous (ripple) counters using D Type flip flops. • Up counters. • Down counters. • Frequency division. Understand the operation of synchronous counters. Describe common control features used in synchronous counters. • BCD counters. • Up/down control. • Enable/disable. • Preset and Clear.
What kind of BCD counter is sn54 / 74ls192?
The SN54/74LS192 is an UP/DOWN BCD Decade (8421) Counter and the SN54/74LS193 is an UP/DOWN MODULO-16 Binary Counter. Separate Count Up and Count Down Clocks are used and in either counting mode the circuits operate synchronously. The outputs change state synchronous with the LOW-to-HIGH transitions on the clock inputs.
How to change up counter to count down?
To convert the up counter in Fig. 5.6.1 to count DOWN instead, is simply a matter of modifying the connections between the flip-flops. By taking both the output lines and the CK pulse for the next flip-flop in sequence from the Q output as shown in Fig. 5.6.3, a positive edge triggered counter will count down from 1111 2 to 0000 2.
Can a counter be used as a frequency divider?
Although this problem prevents the circuit being used as a reliable counter, it is still valuable as a simple and effective frequency divider, where a high frequency oscillator provides the input and each flip-flop in the chain divides the frequency by two.
What are the output lines of a 4 bit counter?
The output lines of a 4-bit counter represent the values 2 0, 2 1, 2 2 and 2 3, or 1,2,4 and 8 respectively.