How does a FPGA communicate with an Altera monitor?
For our project, we designed a software interface that communicated with the board via the Altera Monitor. Through this interface, the board could receive data packets sent over an Ethernet network from an external source. Additionally, the board was able to transmit data packets of its own.
How does Ethernet communication interface for the FPGA?
The interface we created does much of the work typically reserved for the next two layers, Network and Transport. Our module takes the Ethernet “frames” captured by the EthMAC, processes them, and determines what kind of response the device should send. The Ethernet MAC core connects to the PHY chip through the external FPGA pins.
Is there a USB core for a FPGA?
On the FPGA side there is an RS232 UART core under the university program. USB is going to be more complicated as you will need to write a driver on the PC side and on the FPGA side you will need to have a USB core. Both of which have a significant time investment to implement.
What are the buffer descriptors on a FPGA?
The Buffer Descriptors (which typically start at 0x600 for recieiving and 0x400 for transmitting) are two 32-bit word (64 bits total) registers that contains the information about an ethernet packet that was written to memory (for Rx) or about to be transmitted (Tx).
Can a FPGA make use of the Ethernet?
Unfortunately, the only IP cores that could be found to make use of the Ethernet were closed-source and required the use of Altera’s proprietary NIOS II processor, which is also closed-source.
What kind of FPGA is used in ECE 5760?
This year’s ECE 5760 class used a Terasic DE2-115 board, containing an Altera Cyclone IV FPGA. Also on board are two Marvell 88ee1111 (Ethernet PHY) chips that allow two gigabit Ethernet connections.
How does Ethernet Connect to the PHY chip?
The Ethernet MAC core connects to the PHY chip through the external FPGA pins. These pins are: 3 communication lines and a clock for reading and writing to status registers on the PHY chip. The EthMAC controller also has two Wishbone Bus ports.