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How does 8b 10b encoding work?
The Fibre Channel 8b/10b coding scheme is also used in other telecommunications systems. Data is expanded using an algorithm that creates one of two possible 10-bit output values for each input 8-bit value. Each 8-bit input value can map either to a 10-bit output value with odd disparity, or to one with even disparity.
Why use 8b 10b encoding?
The 8B/10B encoding serves two purposes. First, it makes sure there are enough transitions in the serial data stream so the clock can be recovered easily from the embedded data. Second, because it transmits the same number of ones as zeros, it maintains a d-c balance.
What is 4B 5B encoding?
The idea of 4B/5B is to insert extra bits into the bit stream so as to break up long sequences of 0s or 1s. Specifically, every 4 bits of actual data are encoded in a 5-bit code that is then transmitted to the receiver; hence, the name 4B/5B.
How many characters are in an 8B / 10B encoder?
The code defines the mapping from a 8-bit byte (256 unique data words) and an additional 12 special (or K) characters into a 10-bit symbol, hence the name 8b/10b encoding.
What is the running disparity in 8b / 10B coding?
Running disparity. 8b/10b coding is DC-free, meaning that the long-term ratio of ones and zeros transmitted is exactly 50%. To achieve this, the difference between the number of ones transmitted and the number of zeros transmitted is always limited to ±2, and at the end of each symbol, it is either +1 or −1.
When is running disparity of 10 bit encoded data invalid?
RUNNING DISPARITY 1 Value of disparity of 10-Bit encoded data is +2 or -2 or 0. 2 +1 or -1 is invalid running disparity of 10-Bit encoded data. 3 The serial data stream is no longer DC-balanced if the disparity is +2 or -2 4 Running disparity is introduce to transmit data stream DC-balanced
What is the purpose of the 8B / 10B line code?
In telecommunications, 8b/10b is a line code that maps 8-bit words to 10-bit symbols to achieve DC-balance and bounded disparity, and at the same time provide enough state changes to allow reasonable clock recovery.