Why SSTL in DDR?

Why SSTL in DDR?

SSTL is primarily designed for driving the DDR (double-data-rate) SDRAM modules used in computer memory; however, it is also used in other applications, notably some PCI Express PHYs and other high-speed devices. SSTL_18, 1.8 V, defined in EIA/JESD8-15A, used in DDR2 among other things.

What is Lvcmos signal?

LVCMOS output signals are used for certain low-powered medical imaging equipment, as well as portable testing and measurement devices, industrial testing equipment, and networking and communication systems. LVCMOS is well-suited to both wireless and wired infrastructure. That covers a lot of ground there.

What is DDR termination regulator?

DDR termination regulators are integrated circuits that are used to regulate power through DDR transmission lines. They achieve power conservation by rapidly dropping or increasing current so that the output termination voltage (VTT) is half of the supply voltage (VDDQ).

What is VDD CPU voltage?

To give a very simple answer: VID is the voltage your CPU would normally be asking for at its current frequency. VDD is what’s actually being fed to your CPU. If you’re doing manual voltage, the motherboard is essentially ignoring the CPU’s VID request, and instead supplying the CPU with whatever you’ve set.

What are the termination methods for DDR SSTL?

I have a question regarding the DDR SSTL termination. The JEDEC Standard (JESD8-9B) about the SSTL Interface for DDRs shows two possible termination methods, class I with single parallel termination and class II with double parallel termination, Figures 4 and 5 of the Standard respectively.

What is the SSTL interface for DDR memory?

SSTL Description. SSTL [Stub Series Terminated Logic] is an electrical interface commonly used with DDR [Double Data Rate] DRAM memory ICs and memory modules. There are a number of standards that define SSTL levels for ICs and or memory module, a few are listed below under the standards section;

What is the series termination resistor for sstl-2?

Bi-Directional signals require the 50 termination resistor at the source in additional to the series termination resistor. SSTL-2 is defined by the JESD8-9 specification. SSTL_3 Series Stub Terminated, used with DDR memory; requires Vddq = 3.3v, Vt = 0.5 x Vddq

Which is electrical interface commonly used with DDR?

SSTL Description SSTL [Stub Series Terminated Logic] is an electrical interface commonly used with DDR